PLP電性分析工程師 (Si/Pi工程師)
職務說明：
1.Provide SI/PI support to package performance
2.Collaborate with package layout engineers to design & optimize test vehicle
3.Perform EM simulations to optimize interconnects for impedance, skew, and crosstalk
4.Conduct IR drop & Z(f) analyses to confirm power distribution network (PDN) performance
5.Develop package substrate design guidelines for customers
專長條件：
1.具Switching Power Supply 設計經驗或半導體封裝SI/PI 經驗
2.Hands on experience with high speed interfaces development focused on Serdes, DDR, PCIE design and simulation, system level power integrity, package materials, understanding cost/performance trade offs
3.Knowledge of DDR simulation methodology and timing analysis
4.Working knowledge of system level power integrity and budgeting (DC, AC, transient analysis)
5.In depth understanding of electromagnetic theory is required
6.Working knowledge of AMI models and tools
7.Lab skills and measurement experience are plus (VNA, TDR, Real Time Scope)
8.Good tools knowledge (HFSS, Q3D, CST, ADS, Cadence PowerSI/DC, Allegro, SIwave, Polar)
9.Ability to define a project schedule and requirements, then deliver to that schedule
10.Experienced in Ansys EM Simulation Tools,Cadence EM Simulation Tools,Vector Network Analyzer,Probing Station
法定權益：
享勞、健保、勞工退休金提撥 / 其它依勞動基準法、性別平等工作法、全民健康保險法等規定之相關福利
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